Bump formation method and bump forming apparatus to semiconductor wafer

ABSTRACT

A bump formation method and a bump forming apparatus for forming bumps on a semiconductor wafer. The apparatus includes a bump forming head, a recognition device, and a control device. ICs formed on the semiconductor wafer are divided into basic blocks. Bump formation is carried out continuously to the ICs included in one basic block. Position recognition to the other basic block is carried out only when the bump formation operation is shifted from one basic block to the other basic block. Thus, in comparison with the conventional art, in which the position recognition operation is carried out every time bumps are formed to each IC, the number of times of the recognition is greatly reduced, so that the productivity can be improved.

TECHNICAL FIELD

[0001] The present invention relates to a bump formation method informing bumps onto electrodes of each of ICs formed on a semiconductorwafer, and a bump forming apparatus which carries out the bump formationmethod.

BACKGROUND ART

[0002] Conventionally in forming bumps onto electrodes of ICs(integrated circuits), bumps have been formed to is every one of ICchips, i.e., individual piece cut one by one from a semiconductor wafer.The conventional bump formation method is inferior in productivitybecause it requires a transfer time for each individual piece to a bumpbonding apparatus to form bumps. For shortening the transfer time, anarrangement of transferring the semiconductor wafer to the bump bondingapparatus to form bumps to the ICs on the semiconductor wafer has cometo be carried out.

[0003] When bumps are to be formed to ICs on the semiconductor wafer, itis necessary to recognize positions of the ICs to form bumps ontoelectrodes of the ICs. The semiconductor wafer itself is heated toapproximately 150-200° C. when bumps are formed, and the heat affectsthe bump bonding apparatus as well, e.g., thermally expands theapparatus or the like. As such, a mark for position recognition formedon each IC has been conventionally imaged by a recognition camera forevery IC before the bumps are formed to each IC, thereby correcting theposition of the semiconductor wafer.

[0004] The semiconductor wafer has, for example, nearly 3000-10000 ICsformed thereon. The larger the number of ICs is, the more it takes timefor the position recognition to form bumps. While for instance, 2-4bumps are formed to each IC, forming one bump takes approximately 60-80msec. On the other hand, recognizing one position recognition markrequires approximately 200-250 msec. Since two position recognitionmarks should be recognized for every IC, the time required for theposition recognition is considerably long as compared with the time forforming bumps, with deteriorating a productivity.

DISCLOSURE OF INVENTION

[0005] The present invention is devised to solve the above-describeddisadvantage and has for its object to provide a bump formation methodand a bump forming apparatus to a semiconductor wafer in which aproductivity when bumps are formed to the semiconductor wafer isimproved in comparison with the conventional art.

[0006] In accomplishing this and other objectives, according to a firstaspect of the present invention is provided a method for forming bumpsto semiconductor wafers, comprising:

[0007] defining basic blocks imaginarily each of which has a pluralityof ICs adjacent each other in a row or column direction or in row andcolumn directions among ICs arranged in a grid pattern on thesemiconductor wafer to be subjected to bump bonding; and

[0008] carrying out position recognition for forming bumps with respectto each of the basic blocks.

[0009] The bump formation method may be designed so that the methodfurther comprising:

[0010] after carrying out the position recognition, forming bumps forevery one of the above-defined basic blocks continuously on ICs includedin each basic block on a basis of the position recognition; and

[0011] when the bump formation operation is shifted from one basic blockto the other basic block among the basic blocks, carrying out theposition recognition to the other basic block for forming bumps to ICsincluded in the other basic block.

[0012] A number of the ICs for defining the basic block can be set to avalue that positional deviations of all electrodes of all ICs in thebasic block and all bumps formed on the electrodes are accommodatedwithin an allowable range when the bumps are continuously formed to theelectrodes.

[0013] The number of the ICs for defining the basic block may bedetermined further based on at least either a position on thesemiconductor wafer where bumps are to be formed, or a time passed afterthe start of the bump formation to the semiconductor wafer.

[0014] After a plurality of the basic blocks are defined, when remainingICs of the number not satisfying the number of ICs for defining thebasic block exist, the bump formation and the position recognition tothe remaining ICs may be carried out for each of the remaining ICs orfor a combination of a plurality of remaining ICs and one remaining ICuntil bumps are formed to all of the remaining ICs.

[0015] The position recognition for the basic block can be carried outby recognizing two marks for position recognition present at diagonalpositions of the basic block among marks for position recognitionapplied to each of ICs at both ends of the basic block.

[0016] An inclination of the ICs arranged to the semiconductor wafer isdetected before the position recognition operation to the basic block,so that detecting the inclination of ICs included in the basic block canbe eliminated by recognizing only one of the two marks for positionrecognition at the position recognition time to the basic block.

[0017] Defective IC information showing a defective IC among the ICsincluded in the basic block can be detected when bumps are continuouslyformed to the ICs.

[0018] It is possible not to form bumps to the defective ICs on thebasis of the defective IC information.

[0019] According to a second aspect of the present invention, anapparatus for forming bumps to a semiconductor wafer is provided whichcomprises:

[0020] a bump bonding apparatus for forming the bumps to ICs arranged ina grid pattern on the semiconductor wafer to be subjected to bumpbonding;

[0021] a recognition device including an image pickup camera movable incolumn and row directions above the semiconductor wafer for imagingmarks for detection on the semiconductor wafer, and detects a positionand an inclination of the ICs on the basis of image pickup informationof the image pickup camera; and

[0022] a control device for defining basic blocks imaginarily each ofwhich has a plurality of ICs adjacent each other in row or columndirection or in row and column directions among the ICs arranged in agrid pattern to the semiconductor wafer, for controlling the recognitiondevice to drive so as to recognize positions in units of basic blocks,and for controlling the bump bonding apparatus to drive on the basis ofposition recognition information obtained by the position recognition soas to continuously form bumps for every basic block to the ICs includedin the basic block.

[0023] The control device can be adapted to obtain the number of ICs fordefining one basic block on the basis of an allowance value forpositional deviation between electrodes of the ICs and the bumps to beformed on the electrodes.

[0024] The control device is further adaptable to determine the numberof ICs for defining the basic block on the basis of at least either aposition on the semiconductor wafer where bumps are to be formed or atime passed after the start of the bump formation to the semiconductorwafer.

[0025] After a plurality of the basic blocks are formed along the row orcolumn direction, when remaining ICs of the number not satisfying thenumber of ICs for defining the basic block exist, the control device maycarry out the bump formation and the position recognition to theremaining ICs for each of the remaining ICs or for a combination of aplurality of remaining ICs and one remaining IC until bumps are formedto all of the remaining ICs.

[0026] The control device may carry out the position recognition to thebasic block by controlling the recognition device to drive so as torecognize two marks for position recognition among marks for positionrecognition applied to each IC of the basic block.

[0027] The bump forming apparatus may be provided with;

[0028] a wafer turning member onto which the semiconductor wafer to besubjected to bump bonding is loaded and which is turned in acircumferential direction of the loaded semiconductor wafer; and

[0029] a turning device for turning the wafer turning member in thecircumferential direction by driving control by the control device,

[0030] wherein the control device detects an inclination of the ICsarranged on the semiconductor wafer before the recognition operation tothe basic block by controlling to drive the recognition device, furthercorrects the inclination by controlling the turning device on the basisof the detected inclination value of the ICs to turn the semiconductorwafer loaded on the wafer turning member, and also controls therecognition device to drive at the position recognition time to thebasic block so as to recognize only one of the two marks for positionrecognition and eliminate the detection of the inclination of the ICsincluded in the basic block.

[0031] The control device can control the recognition device to drive todetect defective IC information showing a defective IC among the ICsarranged on the semiconductor wafer.

[0032] The control device may control operation of the bump bondingapparatus on the basis of the defective IC information so as not to formbumps onto the defective ICs.

[0033] According to the bump formation method of the first aspect andthe bump forming apparatus of the second aspect of the present inventionas described above, there are provided the bump bonding apparatus, therecognition device, and the control device, and the ICs formed on thesemiconductor wafer are divided to basic blocks. The bump formation iscontinuously carried out to the ICs included in the basic block. Theposition recognition for the other basic block is conducted only whenthe bump formation is changed from one basic block to the other basicblock. As compared with the conventional art wherein the positionrecognition operation is carried out every time bumps are formed to eachIC, the number of times of the recognition is greatly reduced and theproductivity can be improved.

[0034] The position between the electrode and the bump can be alwayskept proper by determining the number of ICs for defining the abovebasic block in accordance with at least one of a position on thesemiconductor wafer where the bump formation is carried out and a timepassed after the start of the bump formation.

[0035] Unless all ICs on the semiconductor wafer can be divided toblocks by using only the basic block, the bump formation is carried outfor each IC of the remaining ICs or for each combination of a pluralityof ICs and one IC. Bumps can be formed to all ICs while the number oftimes of the recognition is reduced thereby improving the productivityin comparison with the conventional art.

[0036] Since a distance between two marks for position recognition isincreased by so arranging as to recognize the position recognition marksat diagonal positions in the basic block, the inclination of the basicblock can be obtained with a higher accuracy.

[0037] Moreover, if the inclination of ICs is detected in advance beforethe bump formation, it is enough at the bump formation time to recognizeone of two marks for position recognition of the basic block. The numberof times of the recognition can be further reduced, so that theproductivity can be improved more.

[0038] In addition, detecting the bad mark at the bump formation timesaves the bump formation to ICs with the bad marks. Therefore, a time tobe spent for forming bumps to the ICs which is unnecessary to the ICscan be cut and the productivity can be furthermore improved.

BRIEF DESCRIPTION OF DRAWINGS

[0039] These and other aspects and features of the present inventionwill become clear from the following description taken in conjunctionwith the preferred embodiment thereof with reference to the accompanyingdrawings, in which:

[0040]FIG. 1 is a flow chart showing operations of a bump formationmethod in the preferred embodiment of the present invention;

[0041]FIG. 2 is a flow chart showing operations of the bump formationmethod in the preferred embodiment of the present invention;

[0042]FIG. 3 is a flow chart showing an operation of detecting aposition and an inclination of ICs of a semiconductor wafer which can becarried out before the bump formation operation in FIGS. 1 and 2;

[0043]FIG. 4 is a diagram for explaining a basic block formed in thebump formation operation of FIGS. 1 and 2;

[0044]FIG. 5 is an enlarged view of one basic block in FIG. 4;

[0045]FIG. 6 is a diagram showing a different form of the basic block ofFIG. 4 and a form of a bad mark;

[0046]FIG. 7 is a diagram for explaining changing the number of ICs fordefining the basic block in accordance with a bump formation position onthe semiconductor wafer for the basic block of FIG. 4;

[0047]FIG. 8 is a diagram for explaining changing the number of ICs fordefining the basic block for the basic block of FIG. 4;

[0048]FIG. 9 is a diagram of a state in which a sensor for measuring atemperature above the semiconductor wafer, or the like is installed to ahorn part and an image pickup camera so as to change the number of ICsfor defining the basic block;

[0049]FIG. 10 is a diagram showing a state with a bump formed on anelectrode;

[0050]FIG. 11 is a diagram explanatory of a mark for position correctionwhich is applied to the IC;

[0051]FIG. 12 is a flow chart for explaining the detailed operation ofthe bad mark detection shown in FIG. 1;

[0052]FIG. 13 is a flow chart for explaining the detailed operation ofthe bad mark detection shown in FIG. 1;

[0053]FIG. 14 is a diagram for explaining remaining ICs except the basicblocks;

[0054]FIG. 15 is a diagram of the case where a block for remainder isdefined by the remaining ICs of FIG. 14;

[0055]FIG. 16 is a diagram of the case where blocks for remainder aredefined by the remaining ICs of FIG. 14;

[0056]FIG. 17 is a diagram showing a view field, a maximum deviationarea, etc. of the image pickup camera for explaining the searchoperation carried out in step 32 in FIG. 3;

[0057]FIG. 18 is a flow chart for explaining one search operationcarried out in step 32 in FIG. 3;

[0058]FIG. 19 is a flow chart for explaining another search operationcarried out in step 32 in FIG. 3;

[0059]FIG. 20 is a flow chart for explaining a different searchoperation carried out in step 32 in FIG. 3;

[0060]FIG. 21 is a diagram for explaining the search operation in FIG.18;

[0061]FIG. 22 is a diagram for explaining a quantity of move of the viewfield in the search operation of FIG. 18;

[0062]FIG. 23 is a diagram for explaining the search operation of FIG.19;

[0063]FIG. 24 is a diagram for explaining the search operation of FIG.20;

[0064]FIG. 25 is a diagram for explaining the search operation of FIG.20;

[0065]FIG. 26 is a diagram of an example of a shape of a detection pointfor inclination correction in the search operation of FIG. 20;

[0066]FIG. 27 is a diagram of an example of another shape of thedetection point for inclination correction in the search operation ofFIG. 20;

[0067]FIG. 28 is a diagram of one example of a second detection pointfor recognition in step 4 of FIG. 1;

[0068]FIG. 29 is a perspective view of a bump forming apparatus in theembodiment for executing the bump formation method of FIG. 1; and

[0069]FIG. 30 is a perspective view of a heating device for bondingshown in FIG. 29.

BEST MODE FOR CARRYING OUT THE INVENTION

[0070] A bump formation method to a semiconductor wafers and a bumpforming apparatus to a semiconductor wafer which carries out the bumpformation method according to the preferred embodiment of the presentinvention will be described hereinbelow with reference to the drawingsin which like parts are designated by like reference numerals. All ofICs (integrated circuits) formed on the semiconductor wafer are equal insize and in shape. A form of forming ICs onto the semiconductor wafer isnot specified and can be either forming ICs to an entire face includinga circumferential edge part of the semiconductor wafer or refrainingfrom forming ICs to a marginal part when the marginal part is providedto the circumferential edge part.

[0071] In order to accomplish the above-described objective of improvingthe productivity in forming bumps to the semiconductor wafer as comparedwith the conventional art, roughly, a first to a third points below areintended in the bump formation method to the semiconductor wafer of theembodiment.

[0072] First, one block is defined imaginarily of a plurality of ICs(integrated circuits) formed on the semiconductor wafer. Positionrecognition is carried out in every unit of block by recognizing twomarks for position recognition included in each block, and positionrecognition is omitted when bumps are formed to each of ICs included inthe block. The number of times of the recognition is thus reduced incomparison with the conventional art, so that the productivity isimproved.

[0073] Secondly, the recognition to two marks for position recognitionin the block is reduced to one mark, thereby improving the productivitymore.

[0074] Thirdly, the presence/absence of bad marks applied to ICs on thesemiconductor wafer, the ICs not functioning as ICs, i.e., defective ICsis determined, so that bumps are not formed to the defective ICs. Thusthe productivity is much further improved.

[0075] The bump forming apparatus to a semiconductor wafer which carriesout the above bump formation method to the semiconductor wafer isschematically shown in FIG. 29. The bump forming apparatus 101 comprisesone heating device 110 for bump bonding, a recognition device 150, acontrol device 180, and one bump forming head 190 corresponding to oneexample of a bump bonding apparatus. The bump forming apparatuspreferably includes carriers 130, transfer devices 140 arrangedrespectively to the carry-in side and the carry-out side, a preheatingdevice 160, and a postheating device 170.

[0076] The heating device 110 for bump bonding is roughly comprised of,as shown in FIG. 30, a wafer turning member 111, a turning device 112,and a wafer heater 113. The heating device 110 holds onto the waferturning member 111 a semiconductor wafer 201 without bumps formed yetwhich is to be subjected to bump bonding and heats the loadedsemiconductor wafer 201 by the wafer heater 113 to a bump bondingtemperature which is approximately 150° C. in the embodiment. Asemiconductor wafer after bumps are formed by the bump forming head 190to electrodes of ICs on the semiconductor wafer 201 will be denoted as abump-formed wafer 202.

[0077] The wafer turning member 111 has a metallic disc wafer stage 1111of a larger diameter than a diameter of the semiconductor wafer 201 forloading the semiconductor wafer 201 thereon, and a metallic discturntable 1112 of a nearly equal size as a size of the wafer stage 1111having threads 11127 formed to the entire circumference to be meshedwith a gear 1122 to be described later of the turning device 112.

[0078] The turning device 112 is a device for turning the wafer turningmember 111 with the semiconductor wafer 201 loaded thereon in acircumferential direction of the semiconductor wafer 201. In the presentembodiment, the turning device 112 has a driving source 1121 of a servomotor which is controlled by the control device 180 to drive, the gear1122 to be meshed with the threads 11127 of the turntable 1112, and arotational force transmission mechanism 1123 for transmitting a drivingforce generated by the driving source 1121 to the gear 1122 therebyrotating the gear 1122 while preventing heat of the turntable 1112 frombeing conducted to the driving source 1121. Although a timing belt isused as the rotational force transmission mechanism 1123 in theembodiment, the transmission mechanism is not limited to this structure.

[0079] As described hereinabove, since the semiconductor wafer 201 isturned via the driving source 1121, the rotational force transmissionmechanism 1123, the gear 1122, threads 11127 of the turntable 1122, andthe wafer stage 1111, a turning angle of the semiconductor wafer iscontrolled by the control device 180, enabling the semiconductor wafer201 to be turned at any angle.

[0080] The recognition camera 150 with an image pickup camera 151detects a position of the IC and an inclination to a reference line ofthe IC on the basis of image pickup information of the image pickupcamera 151. The image pickup camera 151 which is freely movable in rowand column directions above the semiconductor wafer 201 picks up imagesof marks 224, 2232-2234 for detection on the semiconductor wafer. Therecognition device 150 is connected to the control device 180. Thecontrol device 180 controls to drive the turning device 112 on the basisof the detected inclination information thereby controlling a quantityof the turn of the wafer turning member 111.

[0081] The bump forming head 190 is a device for forming bumps onto theelectrodes of the ICs on the semiconductor wafer 201 loaded on the waferturning member 111 of the heating device 110 and heated to the bumpbonding temperature. The bump forming head 190 includes, in addition toa wire supply part 191 for supplying a gold wire to be a material forbump, a bump formation part for melting the gold wire to form a meltedball and pressing the melted ball to the electrode, an ultrasonic wavegeneration part for acting ultrasonic waves to the bump at the pressingtime, etc. The thus-constituted bump forming head 190 is attached on anX, Y table 192 which has, e.g., a ball screw structure and is movable inmutually orthogonal X and Y directions on a plane. The bump forming head190 is moved in the X, Y directions by the X, Y table 122 to be able toform bumps to electrodes of each IC of the fixed semiconductor wafer201.

[0082] The carriers 130 are devices for taking out the semiconductorwafer 201 from a first storage container in which the semiconductorwafer 201 is stored and for transferring to store the bump-formed wafer202 to a second storage container which is to store the bump-formedwafer 202.

[0083] One of the transfer devices 140 receives the semiconductor wafer201 from the carrier 130, then transferring the wafer 201 to thepreheating device 160 and moreover transfers the wafer 201 from thepreheating device 160 to the heating device 110 for bump bonding. Theother transfer device 140 transfers the bump-formed wafer 202 on thewafer stage 1111 to the postheating device 170 and delivers the wafer202 from the postheating device 170 to the carrier 130.

[0084] The preheating device 160 is a device for raising a temperatureof the semiconductor wafer 201 loaded thereon from a room temperature tothe bump bonding temperature at which bumps are formed by the heatingdevice 110.

[0085] The postheating device 170 is a device for gradually decreasing atemperature of the bump-formed wafer 202 loaded thereon from the bumpbonding temperature to the vicinity of the room temperature.

[0086] The control device 180 controls to drive each part constitutingthe bump forming apparatus 101 of the above constitution, therebycontrolling the bump formation method including the aforementionedfirst-third points to be described in detail below.

[0087] The bump formation method carried out by the above-constitutedbump forming apparatus 101 will be depicted hereinbelow. The bumpformation method is executed by driving control by the control device180. Processing and transfer operations to the semiconductor wafer 201from the first storage container to the heating device 110, andprocessing and transfer operations to the bump-formed wafer 202 from theheating device 110 to the second storage container after bumps areformed to the semiconductor wafer 201 are omitted from the followingdescription. The operation up to the end of the bump formation after thesemiconductor wafer 201 is loaded to the wafer stage 1111 of the heatingdevice 110 will be detailed below.

[0088] The bump formation method is briefly indicated in FIGS. 1-3,which will be discussed along each step (designated by “S” in thedrawings).

[0089] An allowable range of a positional deviation of the bumps to theelectrodes when bumps are formed to the electrodes of the IC isconventionally ±5 μm. The value of the allowable range is determinedwhile the thermal expansion or the like of the image pickup camera 151and the bump forming head 190 because of the heat heating thesemiconductor wafer 201 for bump formation is taken into account. Theallowable range of the above ±5 μm is a range which can be satisfiedeven when bumps are formed onto electrodes on a single IC in a size of5-6 mm square. Therefore, with respect to a single IC in a size of 0.5mm or 0.35 mm square in these days, the allowable range can be fulfilledeven if bumps are continuously formed to, e.g, approximately 10 of theICs without executing position recognition.

[0090] Therefore, according to the present embodiment, in step 1, abasic block is defined imaginarily having a plurality of ICs adjacenteach other in a row or column direction, or in row and column directionsamong ICs arranged in a grid pattern on the semiconductor wafer 201 tobe subjected to bump bonding. Position recognition is executed withrespect to the basic block. Then bumps are continuously formed to allICs included in the basic block. So, the bump forming operation iscarried out every basic block. When the bump formation is moved from onebasic block to another basic block among the basic blocks, the positionrecognition is executed with respect to the another basic block to formbumps to the ICs included in the another basic block.

[0091] By adopting this method, the number of times of the IC positionrecognition can be reduced in comparison with the conventional art inwhich the recognition operation is carried out for every IC. Thus, theproductivity in forming bumps to the semiconductor wafer can be improvedas compared with the conventional art.

[0092] The number of ICs for defining the above basic block is a valuethat, when the bumps are continuously formed onto the electrodes of allICs in the basic block without executing position recognition for eachIC, all of the positional deviations between the electrodes and bumpsthereon is kept within the allowable range. Conversely, a single basicblock is defined by such number of ICs.

[0093] The number of rows, columns of ICs for forming the basic block ispreliminarily stored to a memory part 181 in the control device 180.

[0094] The operation of forming the basic block will be described belowwith reference to the drawings. As shown in FIG. 4, the semiconductorwafer 201 loaded on the wafer stage 1111 and sucked to the wafer stage1111 in the embodiment has a plurality of ICs 223 arranged in the gridpattern along a row direction 221 and a column direction 222. Thecontrol device 180 forms basic blocks 230 starting from the IC 223 wherethe bump formation is to be started in accordance with the stored numberof rows and columns of ICs for defining the basic block. For example asshown in FIG. 5, the control device 180 forms basic blocks 230-1, 230-2,. . . , of, e.g., one row and four columns from, e.g., a circumferentialedge portion of a central part of the semiconductor wafer 201.

[0095] The position where the bump formation is to be started is notrestricted to the aforementioned position. Also the number of rows andcolumns of ICs for defining the basic block is not limited to the above,and the basic block may be defined, for instance, of a plurality of rowsand a plurality of columns as shown in FIG. 6 or may be defined of aplurality of rows and one column.

[0096] The number of rows and columns of ICs in the basic block 230 isnot limited to a constant value and can be changed. For example, whilethe ultrasonic wave generation part of the bump forming head 190 ispartly positioned above the wafer stage 1111 at the circumferential edgeportion of the semiconductor wafer 201, the other part is positioned outof the wafer stage 1111 and consequently the thermal effect to theultrasonic wave generation part becomes uneven in some cases because thewafer stage 1111 is heated to form bumps as described earlier. As such,for a position, e.g., the circumferential edge portion of thesemiconductor wafer 201 where the thermal effect is not even to, e.g., ahorn part 193 of the ultrasonic wave generation part of the bump forminghead 190 as shown in FIG. 7, the basic block can be defined by one rowand two columns like basic blocks 231-1, 231-2. On the other hand, for aposition, e.g., the central portion of the semiconductor wafer 201 wherethe thermal effect is relatively even, the basic block can be defined byone row and four columns as in basic blocks 230-1, 230-2.

[0097] As indicated in FIG. 8, in the case where the bump formation isstarted from, e.g., an IC 223-1, basic blocks 230 may not be formedwhile a lapse of time from the start of bump formation is short, andbasic blocks 230 are formed as the passed time is longer. That is, thenumber of rows and columns of ICs may be increased to a certain constantvalue such as, e.g., in a basic block 230-4 of one row and two columns,a basic block 230-5 of one row and three columns.

[0098] A temperature sensor of, e.g., a thermocouple or strain sensor195 may be attached to at least either the horn part 193 of the bumpforming head 190 or the image pickup camera 151 as shown in FIG. 9, sothat the control device 180 may determine the number of rows and columnsof ICs in the basic block 230 on the basis of output information of thesensor 195.

[0099] Alternatively, the number of rows and columns of ICs of the basicblock 230 may be determined by a position of the ICs 223 on thesemiconductor wafer 201 where bumps are to be formed, or the number ofrows and columns of ICs may be forcibly determined or changed.

[0100] Defining the basic block 230 in the control device 180 is carriedout in a manner as follows in the embodiment. As similar to theconventional art, the control device 180 has a program for bumpformation stored in the memory part 181 for each of all ICs 223 formedto the semiconductor wafer 201. Position information of every two marks224 for position recognition present in each IC 223 indicating anarrangement position of the IC 223, position information of eachelectrode 225 present in each IC 223, and information on a bumpformation order to the electrodes 225 present in one IC 223, etc. aredescribed in the program. The control device 180, with utilizing theprogram for bump formation, executes the bump formation operation whiletaking a region of the above-determined number of rows and columns ofICs as the basic block 230.

[0101] In other words, with respect to one unit defining one basic block230, forming a fresh program which represents position information ofthe basic block, position information of electrodes in the basic block,and the like is not executed. The existing program for bump formation isutilized to form bumps. The need of correcting or reforming the programis accordingly eliminated even if the number of rows and columns of ICsof the basic block 230 is changed, thereby facilitating adaptation witha high degree of freedom.

[0102] After the control device 180 determines the basic blocks 230 asabove, in step 2, position recognition is carried out for the basicblock 230 including ICs 223 to which bumps are to be formed. Each of theICs 223 constituting the basic block 230 has two marks 224 for positionrecognition as mentioned above. In the embodiment, first, one of twomarks 224 for position recognition corresponding to diagonal positionsof the basic block 230 among marks 224 of the ICs 223 present at bothends of the basic block 230 is imaged by the image pickup camera 151 ofthe recognition device 150. For instance in the basic block 230 shown inFIG. 5, for example a first mark 224-1 for position recognition of twomarks 224-1 and 224-2 for position recognition corresponding to thediagonal positions is imaged.

[0103] In next step 3, it is determined whether or not information forposition correction of the ICs 223 is already obtained and aninclination of the ICs 223 is already corrected when the semiconductorwafer 201 is placed on the wafer stage 1111. Although the operation ofobtaining the information for position correction for the ICs 223 andcorrecting the inclination of the ICs 223 which are determined in step 3will be described in detail later, in the case where the ICs 223 arealready corrected particularly in inclination, operation in next step 4can be eliminated. Accordingly the number of times of the recognitionoperation is reduced and the productivity is improved. On the otherhand, if the inclination is not corrected yet, the step moves to nextstep 4.

[0104] In step 4, the image pickup camera 151 of the recognition device150 images the remaining second mark 224-2 for position recognition ofthe two position recognition marks 224-1 and 224-2. Based on theposition information of the two position recognition marks 224-1 and224-2, the control device 180 obtains a position and an inclination ofthe basic block 230 according to a known arithmetic method.

[0105] In the present embodiment, position recognition marks 224-1 and224-2 present at both ends of the basic block 230 are employed in steps2 and 4. Although using the position recognition marks 224 present atdiagonal positions is preferred particularly from a viewpoint ofobtaining the inclination information of the basic block 230, theposition recognition mark 224 to be used is not limited to the positionrecognition marks 224-1 and 224-2 present at both ends of the basicblock 230 and any different two points can be selected to be theposition recognition mark.

[0106] In succeeding step 5, on the basis of the above inclinationinformation of the basic block 230 which is obtained in step 2 or insteps 2 and 4, the control device 180 controls to drive the turningdevice 112 of the heating device 110 to turn the wafer stage 1111 sothat the IC 223 becomes parallel to a reference line, e.g., the Xdirection or Y direction. At this time, the wafer stage 1111 can beturned by any angle because the present embodiment adopts theconstitution including the wafer turning member 111 and the turningdevice 112 as described before.

[0107] The control device 180 controls a quantity of the move of the X,Y table 192 of the bump forming head 190 based on the above positioninformation of the basic block 230 when bumps are to be formed.

[0108] In following step 6, the control device 180 controls to drive thebump forming head 190 based on the program for bump formation withrespect to the semiconductor wafer 201 loaded and sucked onto the waferstage 1111 and also heated to the bonding temperature, thereby formingbumps 226 as shown in FIG. 10 onto each of electrodes 225 of the ICs 223included in the basic block 230.

[0109] Bumps are continuously formed in the bump formation operationwithout carrying out position recognition of IC 223 to all ICs 223included in one basic block 230. Without the position recognitionoperation executed for each of the ICs 223 according to the embodiment,the number of times of the position recognition is reduced in comparisonwith the conventional art, thus enabling the productivity to beimproved.

[0110] Step 7 is carried out together with the bump formation after thebumps 226 are started to be formed.

[0111] In the aforementioned step 7, it is determined whether or not abad mark applied to the ICs 223 included in the basic block 230 to whichthe bump formation is being formed is to be detected. The bad mark isapplied, e.g., at an inspection after a wiring pattern recognitionprocess before the bumps are formed onto the electrodes 225, which is amark for indicating a defective IC not functioning as an IC. The badmark is applied to a nearly central part of the IC 223 as shown by anumeral 227 in FIG. 6 or applied over-lapping with one of the twoposition recognition marks 224 of the IC 223 as shown in FIG. 11. Thebad mark is formed to any position within the IC 223. In the case wherethe bad mark 227 is formed overlap-ping with the position recognitionmark 224, it becomes impossible to recognize the position recognitionmark 224 having the bad mark 227. Therefore, with the utilization of thenonrecognition, it can be determined so that the IC 223 or basic block230 is a defective IC or defective block if the position recognitionmark 224 cannot be recognized. However, bad marks 227 might be includedin other ICs 223 in the basic block 230 in some cases even when the badmark 227 is not detected at the position recognition mark 224 of thebasic block 230. Therefore, the detection for the bad mark 227 ispreferably carried out for other ICs 223 as well.

[0112] The presence/absence of the bad mark is detected by imaging theICs 223 by the image pickup camera 151 in the embodiment.

[0113] In the case where the bad mark 227 is applied to one of twoposition recognition marks 224-1 and 224-2 to be recognized in the basicblock 230 and when the bad mark is actually detected, the positionrecognition with respect to other basic blocks 230 may be startedwithout forming bumps to the subject basic block 230. However, some ofthe ICs 223 constituting the basic block 230 which is detected toinclude the bad mark 227 may be good ICs. In order not to waste goodICs, even if one of the position recognition marks 224-1 and 224-2imaged for the position recognition of the basic block 230 has the badmark 227, it is preferable to make determination for each of the ICs 223included in the basic block 230 whether or not the bad mark 227 isapplied thereto, as shown in steps 811-813 in FIG. 13.

[0114] Supposed that the basic block 230 is defined by, e.g., six ICs223 of one row and six columns and when the basic block 230 is detectedthrough the position recognition to include the bad mark 227, it may beso arranged as shown in step 814 of FIG. 13 that the presence/absence ofthe bad mark 227 is recognized for each of divided basic blocks whichare obtained by more finely dividing the subject basic block 230 inplace of immediately determining the presence/absence of the bad mark227 for each IC 223 in the basic block as above. If the bad mark 227 isdetected in the divided basic block, the presence/absence of the badmark 227 is recognized for a next divided basic block or next basicblock. The operation of step 814 is effective when two positionrecognition marks 224 are to be recognized for the basic block 230.

[0115] Alternatively, the IC 223 detected to include the bad mark 227may be separated from the basic block 230 so as not to form bumps to thesubject IC 223 with the bad mark, and the position recognition of thesubject basic block 230 may be executed with a next, e.g., adjoining IC223.

[0116] The following description of the bad mark detection operationexemplifies the case of determining the presence/absence of the bad mark227 for every one of all ICs 223 in the basic block 230.

[0117] When the bad mark is to be detected, the step moves to next step8, where the bad mark is detected. The control device 180 stops formingbumps to the IC 223 determined to have the bad mark and moves to detectthe bad mark for a next IC 223. A time required for forming bumps to theIC 223 which is useless to the IC 223 with the bad mark can be cut bythis operation and the productivity can be improved.

[0118] On the other hand, when the bad mark is not to be detected, thestep goes to step 9 while bumps are formed to all ICs 223 included inthe basic block 230.

[0119] When the inclination correction to the semiconductor wafer 201 isalready executed which is determined in the above-described step 3 andwhen the bad mark 227 is formed overlapping with one positionrecognition mark 224, an operation to be described below may be carriedout in step 8 with reference to FIG. 12. It becomes impossible torecognize the position recognition mark 224 when the bad mark 227 isformed overlapping with one of the position recognition marks 224, andeventually it becomes impossible to recognize the position of the IC 223or basic block 230. For avoiding this, with respect to each IC 223, itis necessary to treat, in addition to the position recognition mark 224,an arbitrary point in a circuit pattern on the IC 223 as a mark 228 forposition correction to substitute for the position recognition mark 224as shown in FIG. 11. The mark 228 for position correction is illustratedto be triangular in FIG. 11 for the sake of convenience. Although themark 228 for position correction may be formed separately to the IC 223,it is simpler and preferable to register the arbitrary point in thecircuit pattern of the IC 223 as above into a program as the positioncorrection mark 228.

[0120] Regarding FIG. 12 showing the operation of step 8 in detail, instep 801, the control device 180 controls to drive the recognitiondevice 150 to recognize one position recognition mark 224 of the IC 223included in the basic block 230 as described earlier. When the positionrecognition mark 224 can be recognized, in other words, when the IC 23includes no bad mark, the step goes to step 802, in which the controldevice 180 controls to drive the bump forming head 190 to form bumps 226to electrodes 225 of the IC 223.

[0121] Meanwhile, when the position recognition mark 224 cannot berecognized in step 801, that is, when the IC 223 has the bad mark, thestep moves to step 803 and the control device 180 determines whether ornot the number of counts that the position recognition mark 224 cannotbe recognized is n or less. In other words, how many defective ICs arecontinuously detected is determined.

[0122] In some cases, the position of a good IC cannot be determinedeven if the good IC is detected after many defective ICs are detected,or a quantity of the positional deviation between the electrode and thebump exceeds the allowable range even when the bumps are formed to theelectrodes of the good IC. Therefore, the above number n is the numberof ICs 223 in which at least the quantity of the positional deviationbetween the electrode 225 and the bump 226 of the IC 223 is accommodatedwithin the allowable range. The number n is set to the control device180 in advance.

[0123] When the number of counts that the position recognition mark 224cannot be recognized is not larger than the n in step 803, the stepshifts to step 9. On the other hand, When the number of counts exceedsthe above n, it is highly possible that the quantity of the positionaldeviation between the electrode 225 and the bump 226 of the IC 223exceeds the allowable range as mentioned above. Then it is determined instep 804 whether or not the operation is to be stopped because of anerror, and the operation is stopped in step 806 if it is so determined.Oppositely, if the operation is not to be stopped, the step goes to step805 and the control device 180 controls to operate the recognitiondevice 150 thereby recognizing the position correction mark 228 andconfirming the present position to correct the position. The step thenmoves to step 9.

[0124] Although it is so adapted in the embodiment as to actually detectthe presence/absence of the bad mark 227 in steps 8, 801-806, 811-814,the bump formation may be executed on the basis of, e.g., position dataof defective ICs in the already processed semiconductor wafer. In thiscase, since position data of the defective ICs is hardly equal in allsemiconductor wafers 201, it is preferable to detect the position of thebad mark 227 again and update the position information of the bad mark227 for every constant number of wafers. The above constant number canbe appropriately set by a manufacturer of the semiconductor wafer 201, aproduction lot of the semiconductor wafer, etc.

[0125] Even when the bad mark 227 is not to be detected in step 811,step 815 may be provided to determine whether or not the bad mark 227 isto be detected for each of ICs 223 in the basic block 230. The step goesto step 9 when the detection is not to be carried out, whereas the stepgoes to step 813 when the detection is to be carried out.

[0126] In next step 9, it is determined whether or not bumps are alreadyformed to all ICs 223 included in the basic block 230 subjected to thebump formation. The step returns to step 6 if an IC 223 without thebumps formed is present. The step advances to step 10 when bumps 226 areformed to all ICs 223 in the basic block 230.

[0127] An example of the bump formation order to all ICs 223 included inthe basic block 230 is indicated in FIG. 6. The basic block 230 isdefined by ICs 233 of two rows and two columns in FIG. 6. Bumps 226 areformed to each of electrodes 225 in the order designated by arrows241-244. As above, the bump formation order is preferably such that thebump formation is completed for every IC 223 included in the basic block230 to almost uniform a bump formation state in one IC.

[0128] It is determined in step 10 whether or not bumps 226 are formedto all ICs 223 in the semiconductor wafer 201. The aforementioned allICs 223 mean all good ICs in the case of not forming bumps to defectiveICs as referred to above.

[0129] The bump formation process to the semiconductor wafer 201 isterminated when bumps are formed to all ICs 223. On the other hand, thestep goes to next step 11 if there are ICs 223 without the bumps formedyet.

[0130] The process related to the bump formation is completed to onebasic block 230 through the operations up to the above step 9. It isdetermined in step 11 whether or not further basic blocks 230 can beformed of the ICs 223 in the semiconductor wafer 201. Specifically,supposed that a certain row in the semiconductor wafer 201 includes,e.g., 15 ICs 223 as shown in FIG. 14, three basic blocks 230, e.g., eachof one row and four columns can be formed and three ICs 223 are left inthe row. The remaining three ICs 223 cannot form the basic block 230 ofone row and four columns. That is, the basic block cannot always bedefined by the set number of rows and columns of ICs.

[0131] When the basic block 230 can be formed of the set number of rowsand columns of ICs, step 11 returns to step 1 to carry out the processrelated to the bump formation as above to the defined basic blocks 230.However, if there are ICs 223 of the number not satisfying the setnumber of rows and columns and consequently the basic block 230 cannotbe formed, step 11 moves to next step 12. In the semiconductor wafer201, a bonding boundary representing a region where bumps 226 can beformed is arranged along circumferential edge parts of the ICs 223 forthe formed ICs 223 on the wafer 201. The above number not satisfying theset number of rows and columns is a number which is obtained withrespect to the ICs 223 included within the region delimited by thebonding boundary. ICs of the number not satisfying the number of rowsand columns for constituting the basic block 230 in a certain row orcolumn, or in certain row and column will be denoted as remaining ICs.

[0132] The control device 180 determines in step 12 whether to carry outthe process related to the bump formation by forming the ICs 223 of thenumber not satisfying the set number of rows and columns into blocks, toexecute the process related to the bump formation for every one of theICs 223, or to execute the process related to the bump formation by acombination of the above. Specifically with reference to the aboveexample, with respect to the remaining ICs 223, one block 2351 forremainder is formed with all of the remaining ICs 223, namely, with theabove three ICs 223 in this example as shown in FIG. 15, and then theprocess related to the bump formation is carried out to the block 2351for remainder. Alternatively, one block 2352 for remainder is formedwith two ICs 223 as shown in FIG. 16 and then the process related to thebump formation is carried out to the block 2352, or the process relatedto the bump formation is carried out individually to each of theremaining ICs 223.

[0133] Whether to define the block 235 for remainder with respect to theremaining ICs 223, or to process the remaining ICs 223 one by one ispreliminarily programmed to the control device 180. In the case ofdefining the block 235 for remainder, the number of rows and columns ofICs 223 for defining the block 235 for remainder with respect to theremaining ICs 223 may be automatically determined by the control device180 or may be set beforehand.

[0134] In next step 13, the process related to the bump formation whichcorresponds to operations of the above steps 2-9 is executed either withrespect to the block 235 for remainder or each of the remaining ICs 223,or with respect to the block 235 for remainder and each of the remainingICs 223, which are constituted in step 12.

[0135] It is determined in next step 14 whether or not bumps 226 arecompletely formed to all ICs 223 in the semiconductor wafer 201. Ifthere are ICs 223 having bumps not formed, the step returns to theforegoing step 12. On the contrary, when all ICs 223 have bumps 226completely formed thereto, the bump formation operation to thesemiconductor wafer 201 is finished. The semiconductor wafer 201 withthe bumps 226 formed is transferred and stored as the bump-formed wafer202 by the transfer device 140 and the carrier 130 into the secondstorage container.

[0136] The operation of obtaining information for position correction ofthe ICs 223 formed on the semiconductor wafer 201 and of correcting theinclination of the ICs 223 (referred to as a “wafer mark recognitionoperation” hereinafter) which is determined as to whether to be alreadyexecuted or not in the above-discussed step 3 will now be described withreference to FIG. 3 and the like. The wafer mark recognition operationalike is controlled by the control device 180.

[0137] In a process prior to forming bumps with the wafer 201 divided toblocks, if the wafer mark recognition operation is executed when thesemiconductor wafer 201 is placed on the wafer stage 1111, therecognition operation for two position recognition marks 224-1 and 224-2carried out in steps 2 and 4 can be reduced to the recognition foreither one mark, so that the productivity is improved furthermore.

[0138] This will be more specifically described. A position of the ICformation pattern on the semiconductor wafer with respect to an outlineof the semiconductor wafer 201 and an inclination of an arrangement inthe row and column directions of ICs 223 forming the IC formationpattern with respect to the reference lines corresponding to the X and Ydirections, i.e., the inclination of the ICs are uniform within the sameproduction lot of the semiconductor wafers 201. However, a positionaldifference and an inclination difference are actually present betweentwo different production lots. As a result, bumps 226 may bepositionally deviated to the electrodes 225 if the bump formation isalways started from an equal position to the semiconductor wafers 201 ofall production lots.

[0139] In order to prevent this, the position of the IC formationpattern with respect to the outline of the semiconductor wafer 201 andthe inclination of ICs to the reference lines are confirmed when thesemiconductor wafer 201 is placed on the wafer stage 1111, therebyeliminating the positional deviation of the bumps 226 to the electrodes225.

[0140] Particularly in the bump forming apparatus 101 of the presentembodiment, as described above, the semiconductor wafer 201 is turnedwith the use of the wafer turning member 111 and the turning device 112arranged at the heating device 110 via the driving source 1121, therotational force transmission mechanism 1123, the gear 1122, the threads11127 of the turntable 1112 and the wafer stage 1111, with the turningangle being controlled by the control device 180, so that thesemiconductor wafer 201 can be turned at any angle. In consequence, thewafer stage 1111 loading the semiconductor wafer 201 thereon can behighly accurately and easily turned on the basis of an angle of theinclination of the ICs obtained by the wafer mark recognition operation.The angle of the inclination of the ICs can be highly accurately andeasily corrected accordingly.

[0141] Since the need of obtaining the angle of the inclination of theICs through the recognition operation to two position recognition marks224-1 and 224-2 at the bump formation time is eliminated by correctingthe angle of the inclination of the ICs beforehand, it is enough toobtain only position information of the IC formation pattern by therecognition operation to either one of the position recognition marks224-1 and 224-2. The number of times of the recognition operation canhence be further reduced and the productivity can be improved.

[0142] The above wafer mark recognition operation will be described indetail.

[0143] In step 31 shown in FIG. 3, it is determined whether or not afirst point among characteristic points on the semiconductor wafer 201loaded on the wafer stage 1111 is recognized by the image pickup camera151 of the recognition device 150. In other words, it is necessary forexecuting the above wafer mark recognition operation to recognize by theimage pickup camera 151 two arbitrary detection points for recognitionwhich correspond to marks for detection on the semiconductor wafer 201.A first detection point for recognition among the above two detectionpoints for recognition is set to the control device 180 beforehand. Asshown in FIG. 17, according to the embodiment, a corner part in anoutline 2231 of the IC formation pattern formed to the circumferentialedge part of the semiconductor wafer 201 to which ICs 223 are formed bya stepper is set as the first detection point 2232 for recognition.

[0144] The image pickup camera 151 has a view field 1511 as indicated inFIG. 17 having a point to be recognized such as, e.g., the firstdetection point 2232 for recognition at a center position of the viewfield. The recognition device 150 can obtain a coordinates position ofthe point to be recognized if the point to be recognized is included ina cell 1512 for rough recognition inside the view field 1511 andmoreover in a cell 1513 for fine recognition in the cell 1512.

[0145] In starting the wafer mark recognition operation, the imagepickup camera 151 is positioned on the basis of coordinates data of thefirst detection point 2232 for recognition. However, the first detectionpoint 2232 for recognition is not always included in the view field 1511when the image pickup camera 151 first images the semiconductor wafer201 because of a displacement or the like of the semiconductor wafer 201when loaded on the wafer stage 1111. Therefore, it is determined in step31 whether or not the first detection point 2232 for recognition can berecognized by the recognition device 150. When the detection point canbe recognized, the step moves to next step 34. The step moves to step 32if the detection point cannot be recognized.

[0146] If a true point to be recognized, i.e., the above first detectionpoint 2232 for recognition is present outside a maximum deviation area1514 defined by four points with coordinates positions of ±x in the Xdirection and ±y in the Y direction from a center position of the viewfield 1511 to which the image pickup camera is positioned, it isimpossible to recognize the first detection point 2232, necessitatingshifting the view field 1511. The maximum deviation area 1514 is aregion beyond the view field 1511.

[0147] In step 32, one of three operations, that is, operation ofsearching for the first detection point 2232 shown in FIG. 18 or 19(steps 321-322 and steps 323-324), operation of searching for the firstdetection point 2232 and operation of facilitating recognizing a seconddetection point both of which are shown in FIG. 20 (steps 325-328) iscarried out. Each of these operations will be described below.

[0148] In the search operation for the first detection point 2232 shownin FIG. 18, in step 321, the image pickup camera 151 starts therecognition operation from a search start position 1515 of (−x, −y)which is a coordinates showing one point among four corners defining themaximum deviation area 1514 as shown in FIG. 21 on the basis of thecoordinates of the first detection point 2232 registered beforehand inthe bump formation program.

[0149] As mentioned before, the position of the preliminarily registeredfirst detection point 2232 is normally not coincident with the centerposition of the view field 1511 because of the displacement or the likeof the semiconductor wafer 201 when loaded, as is clearly shown in FIG.21.

[0150] Although the search start position 1515 is set to the coordinates(−x, −y) in the embodiment, the position is not limited to this and maybe the other three points of the four corners forming the maximumdeviation area 1514.

[0151] The first detection point 2232 is searched for in next step 322while the image pickup camera 151 is moved by every move distance 1517along the X and Y directions in a serpentine search direction 1516within the maximum deviation area 1514 from the above search startposition 1515, for instance, by a predetermined distance along the Xdirection, then by a predetermined distance along the Y direction, thenby a predetermined distance along the opposite direction to the Xdirection, by a predetermined distance along the Y direction again andthen by a predetermined distance again in the X direction.

[0152] The move distance 1517 is set to be a distance corresponding to ⅓a length in the X or Y direction of the view field 1511 in theembodiment as indicated in FIG. 22.

[0153] The way of moving the image pickup camera 151 in the serpentinefashion facilitates recognizing the search operation and its area andsetting the maximum deviation area 1514.

[0154] In the search operation in the steps 321, 322, the search startposition 1515 for the first detection point 2232 is set to (−x, −y)which is the position coordinates of one point among four points formingthe maximum deviation area 1514. Meanwhile, in the search operation forthe first detection point 2232 indicated in FIG. 19, a search startposition 1519 is set to a coordinates of the center of the view field1511 to search the inside of the maximum deviation area 1514 in step323.

[0155] In next step 324, as shown in FIG. 23, the first detection point2232 is searched for while the image pickup camera 151 is moved by theabove every move distance 1517 along a search direction 1518 nearlyspirally inside the maximum deviation area 1514 from the search startposition 1519. The move distance 1517 is set to the distancecorresponding to ⅓ the length in the X or Y direction of the view field1511 in step 324 as well as in step 322.

[0156] The above manner of moving the image pickup camera 151 nearlyspirally enables the first detection point 2232 to be detected early ascompared with the method of moving the image pickup camera in theserpentine way if the first detection point 2232 is highly possiblypresent in the vicinity of the center of the view field 1511. Moreover,when a region inside the view field 1511 where the first detection point2232 is highly possibly present is already known, the first detectionpoint 2232 can be detected early by moving the image pickup camera 151spirally starting from a point within the region of the highpossibility.

[0157] A combined movement method of the above-described serpentinemovement and spiral movement may also be adopted.

[0158] The search operation in steps 325-328 will be discussed here, inwhich the first detection point 2232 is recognized in step 325 based onthe search operation of steps 321-322 and steps 323-324.

[0159] In next step 326, it is determined whether or not a detectionpoint for inclination correction which corresponds to an example of themark for detection is present inside the view field 1511. The detectionpoint for inclination correction is an arbitrary characteristic point onthe semiconductor wafer 201 present inside the view field 1511 havingthe first detection point 2232 at the center thereof, and ispreliminarily registered in the bump formation program. For example, asshown in FIG. 24, a corner part on the outline 2231 of the IC formationpattern which is different from the first detection point 2232 may beset as the detection point 2233 for inclination correction. Thedetection point 2233 for inclination detection may be an arbitrary shapepart in the IC 223 present inside the view field 1511 or a mark for thedetection point for inclination correction may be newly formed in the IC223. Or a mark for the detection point for inclination correction may beformed to a region inside the view field 1511 and outside the outline231 where an aluminum film is formed.

[0160] When the detection point 2233 for inclination correction isdetermined to be inside the view field 1511 in above step 326, theinclination correction detection point 2233 is detected in step 327without moving the image pickup camera 151. In contrast, if theinclination correction detection point 2233 is not present in the viewfield 1511 as in FIG. 24, the step moves to step 328.

[0161] In step 328, the image pickup camera 151 is moved to position thefirst detection point 2232 to the center of the view field 1511 as shownin FIG. 25 because the coordinates position of the first detection point2232 for recognition is already known. Since the detection point 2233for inclination correction is set to be present inside the view field1511 in which the first detection point 2232 is present at the center ofthe view field 1511 as described hereinabove, the detection point 2233for inclination correction can be caught within the view field 1511 bythe above movement of the image pickup camera 151. Other than by movingthe first detection point 2232 to the center of the view field 1511, theimage pickup camera 151, namely, the view field 1511 may be sequentiallymoved to position the first detection point 2232 sequentially to fourcorner parts of the view field 1511 to catch the detection point 2233.

[0162] The step then moves to the aforementioned step 327, where thedetection point 2233 for inclination correction is detected.

[0163] As above, by preliminarily setting the detection point 2233 forinclination correction inside the view field 1511 centering the firstdetection point 2232 for recognition, not only the first detection point2232 for recognition can be recognized, but the detection point 2233 forinclination correction can be recognized. As a result of this, thepositional deviation of the ICs 223 formed on the semiconductor wafer201 can be detected, e.g., on the basis of coordinates information ofthe first detection point 2232, and moreover, rough information on theangle of the inclination of the ICs 223 formed on the semiconductorwafer 201 can be obtained on the basis of the coordinates information ofthe first detection point 2232 for recognition and the detection point2233 for inclination correction. A time necessary for search to berequired in recognition operation for the second detection point forrecognition to be described later can be shortened or even eliminated.

[0164] Since the angle of the inclination can be obtained with a higheraccuracy if the inclination is obtained by detecting a position as faras possible from the first detection point 2232, recognizing the seconddetection point for recognition is carried out in the embodiment asdescribed below. However, the recognition operation for the seconddetection point for recognition can be saved and the inclination angleobtained with the use of the detection point 2233 for inclinationcorrection may be utilized.

[0165] Regarding the detection point 2233 for inclination correction,the corner part in the outline 2231 is set as the detection point 2233for inclination correction in the present embodiment as above. A shapeof the detection point 2233 in the embodiment is accordingly formed oftwo orthogonal lines. However, the shape is not limited to the above twoorthogonal lines and an arbitrary shape, e.g., a circle, a triangle, asquare, a cross or the like can be selected.

[0166] When the shape is other than a circle and if the semiconductorwafer 201 is disposed exceeding, e.g., by ±5° to a normal arrangementposition whereby the recognition device 150 cannot determine theinclination difference of the semiconductor wafer 201, it is difficultto recognize the inclination difference. As such, when the inclinationover the above +5° is estimated, the detection point 2233 forinclination correction is preferably made circular, for example, in aform shown in FIGS. 26 or 27.

[0167] Step 32 is completed by the above operation.

[0168] It is determined in following step 33 whether or not the firstdetection point 2232 for recognition can be detected through the searchoperation in above step 32. The step moves to next step 34 when thedetection point can be detected, whereas an error stop is determinedwhen the detection point cannot be detected and the bump formationprocess is stopped.

[0169] In step 34 similar to above step 31, it is determined whether ornot the second detection point for recognition which is a second pointof characteristic points on the semiconductor wafer 201 placed on thewafer stage 1111 and corresponds to an example of the mark for detectionis recognized by the image pickup camera 151 of the recognition device150. As shown in FIG. 28, the second detection point 2234 forrecognition may be set, e.g., to a corner part on the outline 2231similar to the first detection point 2232 for recognition.

[0170] When the semiconductor wafer 201 is inclined by within the above±5° in terms of an inclination value of the semiconductor wafer 201, thefirst detection point 2232 for recognition and the detection point 2233for inclination correction can be detected by moving the image pickupcamera 151 in the X and Y directions. The image pickup camera 151 isthen moved towards a position where the second detection point 2234 forrecognition is present with the utilization of the rough information onthe inclination angle obtained from the position information of thefirst detection point 2232 for recognition and the detection point 2233for inclination correction. The second detection point 2234 forrecognition is recognized by the same operation as in the above step 32.

[0171] On the other hand, if the inclination of the semiconductor wafer201 is over the above ±5°, the image pickup camera 151 can be moved in amanner as follows towards the position where the second detection point2234 for recognition is present. Since the heating device 110 has thewafer turning member 111 and the turning device 112, and hence can turnthe semiconductor wafer 201 by any angle as described earlier in theembodiment, the semiconductor wafer 201 is roughly positioned by thefollowing operation. Namely, first, the image pickup camera 151 is movedwhile the wafer stage 1111 with the semiconductor wafer 201 thereon isturned, so that both end parts of an orientation flat of thesemiconductor wafer 201 are detected. Then the wafer stage 1111 isturned to a position which corresponds to ½ coordinates obtained on thebasis of the above obtained position information of the two end parts,whereby the semiconductor wafer 201 is roughly positioned. Thereafter,after recognizing the first detection point 2232 as above, the detectionpoint 2233 for inclination correction is detected as in the descriptionof steps 326-328. The image pickup camera 151 is moved towards theposition where the second detection point 2234 is present with theutilization of the rough information on the inclination angle obtainedfrom these position information. The operation of roughly positioningthe semiconductor wafer 201 by detecting the orientation flat may beomitted.

[0172] The operation similar to step 32 is carried out in next step 35,whereby the second detection point 2234 for recognition is recognized.

[0173] By moving the image pickup camera 151 while turning the waferstage 1111 in the manner as above, a quantity of the move of the imagepickup camera 151 can be reduced and the recognition of the detectionpoint 2233 for inclination correction can be sped up.

[0174] It is determined in next step 36 whether or not the seconddetection point 2234 for recognition can be detected by the searchoperation in above step 35. The step goes to next step 37 when thedetection point can be detected. An error stop is determined when thedetection point cannot be detected and the bump formation process isbrought to a halt.

[0175] An angle for turning the wafer stage 1111 is obtained in step 37on the basis of the coordinates information of the first detection point2232 for recognition and the second detection point 2234 for recognitionobtained in above steps 32, 35.

[0176] The control device 180 turns the wafer stage 1111 in followingstep 38 according to the obtained turning angle. Accordingly, the rowand column directions as the arrangement direction of ICs 223 in the ICformation pattern of the semiconductor wafer 201 are agreed with the andY directions. The step goes to step 1 described before.

[0177] As explained above, before step 1 is executed, the inclinationdifference of the IC formation pattern is detected and the quantity ofthe inclination is obtained, and then the semiconductor wafer 201 isturned beforehand in accordance with the quantity of the inclination.The X direction is accordingly agreed with the row direction 221 and theY direction is agreed with the column direction 222. Thus, since theinclination of the basic block 230 is already corrected at a time whenbumps are to be formed, it is enough to recognize only one of two marks224 for position recognition of the basic block 230. So the recognitionoperation can be lessened and the productivity can be improved more.

[0178] As is detailed herein, according to the bump forming apparatus101 and the bump formation method of the present embodiment, the numberof times of the recognition operation is reduced in comparison with theconventional art, so that the productivity can be improved. For instancewhen there are 3100 ICs formed on the semiconductor wafer and 8 bumpsare to be formed to each IC, conventionally, approximately 80 minutesare required to form bumps if two marks are recognized for each IC. Incontrast, the bump formation can be completed in about 38 minutes byexecuting the operation in above steps 31-38 and forming bumps in unitsof blocks as depicted above.

[0179] The productivity can hence be increased to approximately 1.5-3times that of the conventional art according to the bump formingapparatus 101 and the bump formation method of the embodiment. In otherwords, if the productivity is allowed to be an equal level to a level ofthe conventional art, an installation area of the bump forming apparatuscan be reduced to approximately {fraction (1/1.5)}-⅓ an area of theconventional art.

[0180] Although the present invention has been fully described inconnection with the preferred embodiment thereof with reference to theaccompanying drawings, it is to be noted that various changes andmodifications are apparent to those skilled in the art. Such changes andmodifications are to be understood as included within the scope of thepresent invention as defined by the appended claims unless they departtherefrom.

1. A method for forming bumps to a semiconductor wafer (201),comprising: defining basic blocks (230) imaginarily each of which has aplurality of ICs (223) adjacent each other in a row or column directionor in row and column directions among ICs arranged in a grid pattern onthe semiconductor wafer to be subjected to bump bonding; and carryingout position recognition for forming bumps with respect to each of thebasic blocks.
 2. The bump formation method according to claim 1, furthercomprising: after carrying out the position recognition, forming bumpsfor every one of the above-defined basic blocks continuously on ICsincluded in each basic block on a basis of the position recognition; andwhen the bump formation operation is shifted from one basic block to theother basic block among the basic blocks, carrying out the positionrecognition to the other basic block for forming bumps to ICs includedin the other basic block.
 3. The bump formation method according toclaim 1, wherein a number of the ICs for defining the basic block is avalue that positional deviations of all electrodes (225) of all ICs inthe basic block and all bumps (226) formed on the electrodes areaccommodated within an allowable range when the bumps are continuouslyformed to the electrodes.
 4. The bump formation method according toclaim 3, wherein the number of the ICs for defining the basic block isdetermined further based on at least either a position on thesemiconductor wafer where bumps are to be formed, or a time passed afterstart of the bump formation to the semiconductor wafer.
 5. The bumpformation method according to claim 1, wherein after a plurality of thebasic blocks are defined, when remaining ICs of the number notsatisfying the number of ICs for defining the basic block exist, thebump formation and the position recognition to the remaining ICs arecarried out for each of the remaining ICs or for a combination of aplurality of remaining ICs and one remaining IC until bumps are formedto all of the remaining ICs.
 6. The bump formation method according toclaim 1, wherein the position recognition for the basic block is carriedout by recognizing two marks for position recognition (224-1, 224-2)present at diagonal positions of the basic block among marks forposition recognition applied to each of ICs at both ends of the basicblock.
 7. The bump formation method according to claim 6, wherein aninclination of the ICs arranged to the semiconductor wafer is detectedbefore the position recognition operation to the basic block, so thatdetecting the inclination of ICs included in the basic block iseliminated by recognizing only one of the two marks for positionrecognition at the position recognition time to the basic block.
 8. Thebump formation method according to claim 1, wherein defective ICinformation showing a defective IC among the ICs included in the basicblock is detected when bumps are continuously formed to the ICs.
 9. Thebump formation method according to claim 8, wherein bumps are not formedto the defective ICs on the basis of the defective IC information. 10.An apparatus for forming bumps (226) to a semiconductor wafer (201),which comprises: a bump bonding apparatus (190) for forming the bumps toICs (223) arranged in a grid pattern on the semiconductor wafer to besubjected to bump bonding; a recognition device (150) which includes animage pickup camera (151) movable in column and row directions above thesemiconductor wafer for imaging marks for detection (224, 2232-2234) onthe semiconductor wafer, and detects a position and an inclination ofthe ICs on the basis of image pickup information of the image pickupcamera; and a control device (180) for defining basic blocks (230)imaginarily each of which has a plurality of ICs adjacent each other inrow or column direction or in row and column directions among the ICsarranged in a grid pattern to the semiconductor wafer, for controllingthe recognition device to drive so as to recognize positions in units ofbasic blocks, and for controlling the bump bonding apparatus to drive onthe basis of position recognition information obtained by the positionrecognition so as to continuously form bumps for every basic block tothe ICs included in the basic block.
 11. The bump forming apparatusaccording to claim 10, wherein the control device obtains the number ofICs for constituting one basic block on the basis of an allowance valuefor positional deviation between electrodes (225) of the ICs and thebumps to be formed on the electrodes.
 12. The bump forming apparatusaccording to claim 11, wherein the control device further determines thenumber of ICs for defining the basic block on the basis of at leasteither a position on the semiconductor wafer where bumps are to beformed or a time passed after start of the bump formation to thesemiconductor wafer.
 13. The bump forming apparatus according to claim10, wherein, after a plurality of the basic blocks are formed along therow or column direction, when remaining ICs of the number not satisfyingthe number of ICs for defining the basic block exist, the control devicecarries out the bump formation and the position recognition to theremaining ICs for each of the remaining ICs or for a combination of aplurality of remaining ICs and one remaining IC until bumps are formedto all of the remaining ICs.
 14. The bump forming apparatus according toclaim 10, wherein the control device carries out the positionrecognition to the basic block by controlling the recognition device todrive so as to recognize two marks for position recognition (224-1,224-2) among marks for position recognition applied to each IC of thebasic block.
 15. The bump forming apparatus according to claim 14, whichfurther comprises: a wafer turning member (111) onto which thesemiconductor wafer (201) to be subjected to bump bonding is loaded andwhich is turned in a circumferential direction of the loadedsemiconductor wafer; and a turning device (112) for turning the waferturning member in the circumferential direction by driving control bythe control device, wherein the control device detects an inclination ofthe ICs arranged on the semiconductor wafer before the recognitionoperation to the basic block by controlling to drive the recognitiondevice further corrects the inclination by controlling the turningdevice on the basis of the detected inclination value of the ICs to turnthe semiconductor wafer loaded on the wafer turning member, and alsocontrols the recognition device to drive at the position recognitiontime to the basic block so as to recognize only one of the two marks forposition recognition and eliminate the detection of the inclination ofthe ICs included in the basic block.
 16. The bump forming apparatusaccording to claim 10, wherein the control device controls therecognition device to drive to detect defective IC information showing adefective IC among the ICs arranged on the semiconductor wafer.
 17. Thebump forming apparatus according to claim 16, wherein the control devicecontrols operation of the bump bonding apparatus on the basis of thedefective IC information so as not to form the bumps onto the defectiveICs.